Field of the Invention
This invention relates generally to the field of computer processors. More particularly, the invention relates to a method and apparatus for implementing power saving techniques when processing floating point values.
Description of the Related Art
Graphics processors are one of the largest/power critical blocks in current system on a chip (SoC) architectures. Register file (RF) and wide buses consume significant power in graphics processors. In RFs, an operation to read a “1” consumes significantly more power than an operation to read a “0” because of return-to-zero (RZ) domino-style read operations. In addition, writing different values to the RF every cycle can lead to the worst-case power consumption due to large capacitance of write bit lines in non-return-to-zero (NRZ) write operations. Similarly, moving different data on long, wide buses every cycle consumes a large amount of power.